
Target interface (SH7243F/SH7285F/ SH7286F) Aug. 2, 2010 (Fourth Edition)
Mictor connector
Signals
CPU Pin No. CPU Pin No.
SH7243F SH7285F SH7286F SH7243F SH7285F SH7286F
Pin
No.
Signal
Input/
Output
*1
LQFP-100
(FP-100UV)
LQFP-144
(FP-144LV)
LQFP-176
(FP-176AV,
FP-176EV)
Pin
No.
Signal
Input/
Outpu
t
*1
LQFP-100
(FP-100UV)
LQFP-144
(FP-144LV)
LQFP-176
(FP-176AV,
FP-176EV)
1 N.C. 2 N.C.
3
GND
(
ASEMD0)
*2
(Input) (78) (115) (135) 4 N.C.
5
GND
(
CON)
*5
(Output)
6 AUDCK Output 41 64 65
7 N.C. 8
ASEBRKAK
/
ASEBRK
Input/
Output
77 114 134
9 RES Output 76 113 133 10 N.C.
11 TDO Output 7 132 90 12 VCC_AUD
*3
Output
13 N.C. 14 VCC
*4
Output
15 TCK Input 8 133 91 16 N.C.
17 TMS Input 9 134 92 18 N.C.
19 TDI Input 6 131 89 20 N.C.
21 TRST Input 10 135 93 22 N.C.
23 N.C. 24 AUDATA3 Output 38 60 60
25 N.C. 26 AUDATA2 Output 37 59 59
27 N.C. 28 AUDATA1 Output 36 58 58
29 N.C. 30 AUDATA0 Output 35 57 57
31 N.C. 32 AUDSYNC Output 34 63 63
33 N.C. 34 N.C.
35 N.C. 36 N.C.
37 N.C. 38 N.C.
・ For the pin where stated as N.C. in the table, leave the signal unconnected.
*1: Input/output is based on the target system.
*2: To debug,
ASEMD0 pin needs to be brought to Low state.
Shown in the target connection reference diagram is the circuit that brings ASEMD0 pin to Low state when you connect ASEMD0 signal to the connector for
debugger.
If you do not connect ASEMD0 signal to Pin No. 3 of the connector for debugger, the circuit that sets ASEMD0 pin by switch circuit will do. However, in such case,
do not connect ASEMD0 pin to Pin No. 3 of the connector for debugger, but connect Pin No. 3 of connector for the debugger to GND.
*3: For VCC_AUD, the power same as the voltage level at which AUD signal of CPU works is to be connected. Connect the AUD signal to I/O
power of CPU.
*4: For VCC, the power same as the voltage level at which HUDI signal of CPU works is to be connected. Connect the HUDI signal to I/O power
of CPU.
*5: By detection of GND on the target system side, whether the target system is connected or not is determined.
Target connection reference diagram
SH7243F/SH7285F
SH7286F
*1: RES, which is connected to Pin No. 9 of the connector for debugger, is the signal that debugger uses for monitoring the state of RES pin of CPU.
*2:
ASEBRKAK/ASEBRK (Output/Input signals) are multiplexed with FWE (Input signal) in a pin. To allow the operation of the user target alone
when you use the ICE, in making signal arrangement, do not connect the pin to VCC nor GND directly, but connect it to a pull-up resistor with
ohmic value of 4.7K or a pull-down resistor with ohmic value of 100k.
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