Renesas SuperH SH7343 Technical Information Seite 21

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Target interface (SH7144F/SH7145F) Jun. 30, 2009 (Second Edition)
SH7144F/SH7145F
Applicable products PALMiCE3-SH / PALMiCE2-SH
Applicable connectors
(Connectors for debugger)
MIL connector (14-pin design)
MDR connector (36-pin design)
MIL connector
Signals
CPU Pin No. CPU Pin No.
SH7144F SH7145F SH7144F SH7145F
Pin
No.
Signal
Input/
Output
*1
QFP-112 LQFP-144
Pin
No.
Signal
Input/
Output
*1
QFP-112 LQFP-144
1 TCK Input 89 143 2 N.C.
3 TRST Input 86 139 4 GND
5 TDO Output 88 142 6 GND
7 ASEBRKAK Output 27 35 8 VCC
*2
Output
9 TMS Input 85 138 10 GND
11 TDI Input 87 140 12 GND
13 RES Output 84 108 14 GND
For the pin where stated as N.C. in the table, leave the signal unconnected.
*1: Input/output is based on the target system.
*2: For VCC, connect I/O power of CPU. Debugging can be performed even if the signal is N.C., however, by connecting I/O power, leak during
the target system power OFF can be prevented.
Target connection reference diagram
MIL connector specifications
Recommended connector
Manufacturer Omron Corporation
Model XG4C-1431
(Top view on the target board)
(For detailed dimensions of the connector,
refer to the documentation by manufacturer of the connector.)
*Please look at the pin configuration diagram above and make
sure that the connector is in the right direction before connecting.
Please check the pin number in the signal table above and make sure
the signal and the pin numbers match.
*1: To debug, DBGMD pin needs to be brought to High state.
Shown in the target connection reference diagram is the circuit that brings DBGMD pin to High state when you turn OFF the switch.
*2:
RES, which is connected to Pin No. 13 of the connector for debugger, is the signal that debugger uses for monitoring the state of RES pin of
CPU.
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