Renesas H8/325 Series Handbuch Seite 7

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Seitenansicht 6
Rev. 3.0, 09/98, page iv of viii
7.1.3 Input and Output Pins........................................................................................... 129
7.1.4 Register Configuration......................................................................................... 129
7.2 Register Descriptions ........................................................................................................ 130
7.2.1 Free-Running Counter (FRC)
H'FF92............................................................... 130
7.2.2 Output Compare Registers A and B (OCRA and OCRB)
H'FF94.................... 131
7.2.3 Input Capture Registers A to D (ICRA to ICRD)
H'FF98, H'FF9A, H'FF9C, H'FF9E...................................................................... 131
7.2.4 Timer Interrupt Enable Register (TIER)
H'FF90 .............................................. 134
7.2.5 Timer Control/Status Register (TCSR)
H'FF91 ................................................ 136
7.2.6 Timer Control Register (TCR)
H'FF96 ............................................................. 139
7.2.7 Timer Output Compare Control Register (TOCR)
H'FF97............................... 141
7.3 CPU Interface.................................................................................................................... 143
7.4 Operation........................................................................................................................... 146
7.4.1 FRC Incrementation Timing ................................................................................ 146
7.4.2 Output Compare Timing ...................................................................................... 148
7.4.3 Input Capture Timing........................................................................................... 149
7.4.4 Setting of FRC Overflow Flag (OVF).................................................................. 152
7.5 Interrupts ........................................................................................................................... 152
7.6 Sample Application........................................................................................................... 153
7.7 Application Notes.............................................................................................................. 154
Section 8 8-Bit Timers
..................................................................................................... 159
8.1 Overview........................................................................................................................... 159
8.1.1 Features ................................................................................................................ 159
8.1.2 Block Diagram ..................................................................................................... 160
8.1.3 Input and Output Pins........................................................................................... 161
8.1.4 Register Configuration......................................................................................... 161
8.2 Register Descriptions ........................................................................................................ 162
8.2.1 Timer Counter (TCNT)
H'FFCC (TMR0), H'FFD4 (TMR1)............................ 162
8.2.2 Time Constant Registers A and B (TCORA and TCORB)
H'FFCA and H'FFCB (TMR0), H'FFD2 and H'FFD3 (TMR1) ........................... 162
8.2.3 Timer Control Register (TCR)
H'FFC8 (TMR0), H'FFD0 (TMR1) ................. 163
8.2.4 Timer Control/Status Register (TCSR)
H'FFC9 (TMR0), H'FFD1 (TMR1) .... 166
8.2.5 Serial/Timer Control Register (STCR)
H'FFC3 ................................................ 168
8.3 Operation........................................................................................................................... 169
8.3.1 TCNT Incrementation Timing.............................................................................. 169
8.3.2 Compare Match Timing ....................................................................................... 170
8.3.3 External Reset of TCNT....................................................................................... 172
8.3.4 Setting of TCSR Overflow Flag (OVF) ............................................................... 172
8.4 Interrupts ........................................................................................................................... 173
8.5 Sample Application........................................................................................................... 173
8.6 Application Notes.............................................................................................................. 174
Seitenansicht 6
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