
Rev. 3.0, 09/98, page ii of viii
Contents
Section 1 Overview
........................................................................................................... 1
1.1 Overview........................................................................................................................... 1
1.2 Block Diagram .................................................................................................................. 4
1.3 Pin Assignments and Functions......................................................................................... 5
1.3.1 Pin Arrangement .................................................................................................. 5
1.3.2 Pin Functions........................................................................................................ 8
Section 2 CPU
.................................................................................................................... 15
2.1 Overview........................................................................................................................... 15
2.1.1 Features ................................................................................................................ 15
2.2 Register Configuration ...................................................................................................... 16
2.2.1 General Registers ................................................................................................. 17
2.2.2 Control Registers.................................................................................................. 17
2.2.3 Initial Register Values.......................................................................................... 18
2.3 Addressing Modes.............................................................................................................19
2.3.1 Addressing Modes................................................................................................ 19
2.3.2 How to Calculate Where the Excution Starts....................................................... 21
2.4 Data Formats ..................................................................................................................... 25
2.4.1 Data Formats in General Registers....................................................................... 26
2.4.2 Memory Data Formats ......................................................................................... 27
2.5 Instruction Set ................................................................................................................... 28
2.5.1 Data Transfer Instructions.................................................................................... 30
2.5.2 Arithmetic Operations.......................................................................................... 32
2.5.3 Logic Operations.................................................................................................. 33
2.5.4 Shift Operations ................................................................................................... 33
2.5.5 Bit Manipulations................................................................................................. 35
2.5.6 Branching Instructions ......................................................................................... 39
2.5.7 System Control Instructions................................................................................. 41
2.5.8 Block Data Transfer Instruction........................................................................... 42
2.6 CPU States......................................................................................................................... 44
2.6.1 Program Execution State...................................................................................... 45
2.6.2 Exception-Handling State .................................................................................... 45
2.6.3 Power-Down State................................................................................................ 46
2.7 Access Timing and Bus Cycle........................................................................................... 47
2.7.1 Access to On-Chip Memory (RAM and ROM) ................................................... 47
2.7.2 Access to On-Chip Register Field and External Devices..................................... 49
Section 3 MCU Operating Modes and Address Space
........................................... 53
3.1 Overview........................................................................................................................... 53
3.1.1 Mode Selection..................................................................................................... 53
3.1.2 Mode and System Control Registers (MDCR and SYSCR)................................. 54
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