Renesas SuperH SH7710 E10A Technical Information PDF herunterladen (Seite 24)

Table 2.2 Watchdog Timer Register

WTCSR(W) Write Watchdog timer control/status register

WTCNT(W) Write Watchdog timer counter

WTCSR(R) Read Watchdog timer control/status register

WTCNT(R) Read Watchdog timer counter

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The watchdog timer operates only when the user program is executed. Do not change the

value of the frequency change register in the [IO] window or [Memory] window.

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The internal I/O registers can be accessed from the [IO] window. However, note the

following when accessing the SDMR register of the bus-state controller. Before accessing

the SDMR register, specify addresses to be accessed in the I/O-register definition file

(SH7710.IO) and then activate the HEW. After the I/O-register definition file is created,

the MPU’s specification may be changed. If each I/O register in the I/O-register definition

file differs from addresses described in the hardware manual, change the I/O-register

definition file according to the description in the hardware manual. The I/O-register

definition file can be customized depending on its format. Note that, however, the E10A

emulator does not support the bit-field function.

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Verify

In the [IO] window, the verify function of the input value is disabled.

15.Illegal Instructions

If illegal instructions are executed by STEP-type commands, the emulator cannot go to the

next program counter.

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Renesas SuperH SH7710 E10A Technical Information Seite 24