Renesas 70 Technical Information

To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology C

µPD70F3003A, 70F3025A, 70F3003A(A)8Data Sheet U13189EJ5V1DS(2/2)Pin Name I/O Function Alternate FunctionP60 to P63 I/O Port 6 A16 to A194-bit I/O por

µPD70F3003A, 70F3025A, 70F3003A(A)9Data Sheet U13189EJ5V1DS2.2 Non-Port Pins(1/2)Pin Name I/O Function Alternate FunctionTO110 Output Pulse signal o

µPD70F3003A, 70F3025A, 70F3003A(A)10Data Sheet U13189EJ5V1DS(2/2)Pin Name I/O Function Alternate FunctionSCK0 I/O Serial clock I/O for CSI0 to CSI3 (

µPD70F3003A, 70F3025A, 70F3003A(A)11Data Sheet U13189EJ5V1DS2.3 Pin I/O Circuits and Recommended Connection of Unused PinsTable 2-1 shows the I/O ci

µPD70F3003A, 70F3025A, 70F3003A(A)12Data Sheet U13189EJ5V1DSTable 2-1. Types of Pin I/O Circuits and Recommended Connection of Unused Pins (2/2)Pin

µPD70F3003A, 70F3025A, 70F3003A(A)13Data Sheet U13189EJ5V1DSFigure 2-1. Pins I/O CircuitsType 1Type 5Type 2Type 8Type 3P-chN-chINVDDINSchmitt trigge

µPD70F3003A, 70F3025A, 70F3003A(A)14Data Sheet U13189EJ5V1DS3. ELECTRICAL SPECIFICATIONS3.1 Normal Operation ModeAbsolute Maximum Ratings (TA = 25°

µPD70F3003A, 70F3025A, 70F3003A(A)15Data Sheet U13189EJ5V1DSCapacitance (TA = 25°C, VDD = VSS = 0 V)Parameter Symbol Conditions MIN. TYP. MAX. UnitIn

µPD70F3003A, 70F3025A, 70F3003A(A)16Data Sheet U13189EJ5V1DS(b)µPD70F3025AX1 X2C1 C2RdCautions 1. Connect the oscillator as closely to the X1 and X2

µPD70F3003A, 70F3025A, 70F3003A(A)17Data Sheet U13189EJ5V1DSDC Characteristics (TA = –40 to +85°C, VDD = 5.0 V ±10%, VSS = 0 V)(1/2)Parameter Symbol

Notice 1. All information included in this document is current as of the date this document is issued. Such information, however, is subject to chang

µPD70F3003A, 70F3025A, 70F3003A(A)18Data Sheet U13189EJ5V1DS(2/2)Parameter Symbol Conditions MIN. TYP. MAX. UnitSupplyµPD70F3003A,Operating IDD1 Dire

µPD70F3003A, 70F3025A, 70F3003A(A)19Data Sheet U13189EJ5V1DSData Retention Characteristics (TA = –40 to +85°C, VDD = VDDDR)Parameter Symbol Condition

µPD70F3003A, 70F3025A, 70F3003A(A)20Data Sheet U13189EJ5V1DStHVDVDDVDDtFVD tRVDtDRELVDDVDDDRRESET (input)VIHDRNMI (input)(Release by falling edge)VIH

µPD70F3003A, 70F3025A, 70F3003A(A)21Data Sheet U13189EJ5V1DSAC Characteristics (TA = –40 to +85°C, VDD = 5.0 V ±10%, VSS = 0 V)AC test input test poi

µPD70F3003A, 70F3025A, 70F3003A(A)22Data Sheet U13189EJ5V1DS(1) Clock timingParameter Symbol Conditions MIN. MAX. UnitX1 input cycle <1> tCYX D

µPD70F3003A, 70F3025A, 70F3003A(A)23Data Sheet U13189EJ5V1DS(2) Input wave(a) P02 to P07, P12 to P17, P23, P24, P26, P27, P32 to P37, P112 to P117, R

µPD70F3003A, 70F3025A, 70F3003A(A)24Data Sheet U13189EJ5V1DS(3) Output wave (other than CLKOUT)Parameter Symbol Conditions MIN. MAX. UnitOutput rise

µPD70F3003A, 70F3025A, 70F3003A(A)25Data Sheet U13189EJ5V1DS(5) Read timing (1/2)Parameter Symbol Conditions MIN. MAX. UnitDelay time from CLKOUT↑ to

µPD70F3003A, 70F3025A, 70F3003A(A)26Data Sheet U13189EJ5V1DS(5) Read Timing (2/2): 1 waitT1 T2 TW T3CLKOUT (output)A16 to A19 (output)AD0-AD15 (I/O)

µPD70F3003A, 70F3025A, 70F3003A(A)27Data Sheet U13189EJ5V1DS(6) Write timing (1/2)Parameter Symbol Conditions MIN. MAX. UnitDelay time from CLKOUT↑ t

1998DATA SHEETThe mark shows major revised points.MOS INTEGRATED CIRCUITµPD70F3003A, 70F3025A, 70F3003A(A)V85332-BIT SINGLE-CHIP MICROCONTROLLERSD

µPD70F3003A, 70F3025A, 70F3003A(A)28Data Sheet U13189EJ5V1DS(6) Write timing (2/2): 1 waitT1 T2 TW T3CLKOUT (output)A16 to A19 (output)AD0-AD15 (I/O

µPD70F3003A, 70F3025A, 70F3003A(A)29Data Sheet U13189EJ5V1DS(7) Bus hold timing (1/2)Parameter Symbol Conditions MIN. MAX. UnitHLDRQ setup time (to C

µPD70F3003A, 70F3025A, 70F3003A(A)30Data Sheet U13189EJ5V1DS(7) Bus hold timing (2/2)TH TH TH TITHCLKOUT (output)HLDAK (output)DSTB (output)HLDRQ (in

µPD70F3003A, 70F3025A, 70F3003A(A)31Data Sheet U13189EJ5V1DS(8) Interrupt timingParameter Symbol Conditions MIN. MAX. UnitNMI width, high <63>

µPD70F3003A, 70F3025A, 70F3003A(A)32Data Sheet U13189EJ5V1DS(9) CSI timing (1/2)(a) Master mode(i) CSI0 to CSI2 timingParameter Symbol Conditions MIN

µPD70F3003A, 70F3025A, 70F3003A(A)33Data Sheet U13189EJ5V1DS(9) CSI timing (2/2)(ii) CSI3 timingParameter Symbol Conditions MIN. MAX. UnitSCK3 cycle

µPD70F3003A, 70F3025A, 70F3003A(A)34Data Sheet U13189EJ5V1DS(10) RPU timingParameter Symbol Conditions MIN. MAX. UnitTI1n high-level width <74>

µPD70F3003A, 70F3025A, 70F3003A(A)35Data Sheet U13189EJ5V1DSA/D Converter Characteristics (TA = –40 to +85°C, VDD = AVDD = 5 V ±10%, VSS = AVSS = 0 V

µPD70F3003A, 70F3025A, 70F3003A(A)36Data Sheet U13189EJ5V1DSD/A Converter Characteristics (TA = –40 to +85°C, VDD = AVDD = 5 V ±10%, VSS = AVSS = 0 V

µPD70F3003A, 70F3025A, 70F3003A(A)37Data Sheet U13189EJ5V1DS3.2 Flash Memory Programming ModeBasic Characteristics (TA = 10 to 40°C (when rewriting)

µPD70F3003A, 70F3025A, 70F3003A(A)2Data Sheet U13189EJ5V1DSAPPLICATIONSµPD70F3003A, 70F3025A: Camcorders, VCRs, PPCs, LBPs, printers, motor controlle

µPD70F3003A, 70F3025A, 70F3003A(A)38Data Sheet U13189EJ5V1DSCautions 1. VPP pull-down resistance value (RVPP) is recommended to be in the range 5 kΩ

µPD70F3003A, 70F3025A, 70F3003A(A)39Data Sheet U13189EJ5V1DS(2) µPD70F3025A (X rank) Parameter Symbol Conditions M

µPD70F3003A, 70F3025A, 70F3003A(A)40Data Sheet U13189EJ5V1DS4. PACKAGE DRAWING100-PIN PLASTIC LQFP (FINE PITCH) (14x14)NOTEEach lead centerline is

µPD70F3003A, 70F3025A, 70F3003A(A)41Data Sheet U13189EJ5V1DS5. RECOMMENDED SOLDERING CONDITIONSThe µPD70F3003A, 70F3025A, and 70F3003A(A) should be

µPD70F3003A, 70F3025A, 70F3003A(A)42Data Sheet U13189EJ5V1DS(3) µPD70F3003AGC(A)-33-8EU: 100-pin plastic LQFP (fine pitch) (14 × 14)Soldering Method

µPD70F3003A, 70F3025A, 70F3003A(A)43Data Sheet U13189EJ5V1DSAPPENDIX NOTES ON TARGET SYSTEM DESIGNThe following shows a diagram of the connection co

µPD70F3003A, 70F3025A, 70F3003A(A)44Data Sheet U13189EJ5V1DS1234VOLTAGE APPLICATION WAVEFORM AT INPUT PINWaveform distortion due to input noise or a

µPD70F3003A, 70F3025A, 70F3003A(A)45Data Sheet U13189EJ5V1DSRelated document:µPD703003A, 703004A, 703025A, 703003A(A), 703025A(A) Data Sheet (U13188E

µPD70F3003A, 70F3025A, 70F3003A(A)46Data Sheet U13189EJ5V1DSRegional Information• Device availability• Ordering information• Product release sched

µPD70F3003A, 70F3025A, 70F3003A(A)The information in this document is current as of July, 2005. The information is subject to change without notice.

µPD70F3003A, 70F3025A, 70F3003A(A)3Data Sheet U13189EJ5V1DSP40 to P47: Port 4P50 to P57: Port 5P60 to P63: Port 6P70 to P77: Port 7P90 to P96: Port 9

µPD70F3003A, 70F3025A, 70F3003A(A)4Data Sheet U13189EJ5V1DSINTERNAL BLOCK DIAGRAMINTP110 to INTP113INTP120 to INTP123INTP130 to INTP133INTP140 to INT

µPD70F3003A, 70F3025A, 70F3003A(A)5Data Sheet U13189EJ5V1DSCONTENTS1. DIFFERENCES BETWEEN PRODUCTS ··················································

µPD70F3003A, 70F3025A, 70F3003A(A)6Data Sheet U13189EJ5V1DS1. DIFFERENCES BETWEEN PRODUCTSItem µPD703003AµPD703004AµPD703025AµPD703003A(A)µPD703025

µPD70F3003A, 70F3025A, 70F3003A(A)7Data Sheet U13189EJ5V1DS2. PIN FUNCTIONS2.1 Port Pins(1/2)Pin Name I/O Function Alternate FunctionP00 I/O Port 0