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PD70F3003A, 70F3025A, 70F3003A(A)

Data Sheet U13189EJ5V1DS

A/D Converter Characteristics (TA = –40 to +85°C, VDD = AVDD = 5 V ±10%, VSS = AVSS = 0 V)

Parameter Symbol Conditions MIN. TYP. MAX. Unit

Resolution — 10 10 10 bit

Overall error

Note 1

— 4.5 V ≤ AVREF1 ≤ AVDD ±0.4 %FSR

— 3.5 V ≤ AVREF1 ≤ AVDD ±0.7 %FSR

Quantization error — ±1/2 LSB

Conversion time tCONV 4.5 V ≤ AVREF1 ≤ AVDD 60 tCYK

3.5 V ≤ AVREF1 ≤ AVDD 60 tCYK

Sampling time tSAMP 4.5 V ≤ AVREF1 ≤ AVDD 10 tCYK

3.5 V ≤ AVREF1 ≤ AVDD 10 tCYK

Zero-scale error

Note 1

— 4.5 V ≤ AVREF1 ≤ AVDD ±1.5 ±3.5 LSB

— 3.5 V ≤ AVREF1 ≤ AVDD ±1.5 ±4.5 LSB

Full-scale error

Note 1

— 4.5 V ≤ AVREF1 ≤ AVDD ±1.5 ±2.5 LSB

— 3.5 V ≤ AVREF1 ≤ AVDD ±1.5 ±4.5 LSB

Non-linearity error

Note 1

— 4.5 V ≤ AVREF1 ≤ AVDD ±1.5 ±2.5 LSB

— 3.5 V ≤ AVREF1 ≤ AVDD ±1.5 ±4.5 LSB

Analog input VIAN –0.3 AVDD + 0.3 V

voltage

Note 2

Reference voltage AVREF1 3.5 AVDD V

AVREF1 current AIREF1 1.2 3.0 mA

AVDD supply current AIDD 2.3 6.0 mA

Notes 1. Except quantization error.

2. The conversion result is 000H when V

IAN = 0.

Converted with 10-bit resolution when 0 < VIAN < AVREF1.

The conversion result is 3FFH when AV

REF1 ≤ VIAN ≤ AVDD.

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Renesas 70 Technical Information Seite 37