Renesas 70 Technical Information PDF herunterladen (Seite 29)

PD70F3003A, 70F3025A, 70F3003A(A)

Data Sheet U13189EJ5V1DS

(6) Write timing (1/2)

Parameter Symbol Conditions MIN. MAX. Unit

Delay time from CLKOUT↑ to address

<20> tDKA 3 20 ns

Delay time from CLKOUT↑ to R/W, UBEN, LBEN

<78> tDKA2 –2 +13 ns

Delay time from CLKOUT↓ to ASTB

<22> tDKST 3 15 ns

Delay time from CLKOUT↑ to DSTB

<23> tDKD 3 15 ns

WAIT setup time (to CLKOUT↓) <26> tSWTK 5 ns

WAIT hold time (from CLKOUT↓) <27> tHKWT 5 ns

Address hold time (from CLKOUT↑)

<28> tHKA 0 ns

Address setup time (to ASTB↓) <29> tSAST

–40°C ≤ TA ≤ +70°C

0.5 T – 10 ns

70°C < TA ≤ 85°C

0.5 T – 12 ns

Address hold time (from ASTB↓) <30> tHSTA 0.5 T – 10 ns

Delay time from ASTB↓ to DSTB↓ <34> tDSTD 0.5 T – 10 ns

Delay time from DSTB

↑

to ASTB

↑

<37> tDDSTH 0.5 T – 10 ns

DSTB low-level width <39> tWDL

–40°C ≤ TA ≤ +70°C

(1 + n) T – 10 ns

70°C < TA ≤ 85°C

(1 + n) T – 13 ns

ASTB high-level width <40> tWSTH T – 10 ns

WAIT setup time (to address) <41> tSAWT1

n ≥ 1, –40°C ≤ TA ≤ +70°C

1.5 T – 20 ns

n ≥ 1, 70°C < TA ≤ 85°C

1.5 T – 24 ns

<42> tSAWT2

n ≥ 1, –40°C ≤ TA ≤ +70°C

(1.5 + n) T – 20 ns

n ≥ 1, 70°C < TA ≤ 85°C

(1.5 + n) T – 24 ns

WAIT hold time (from address) <43> tHAWT1 n ≥ 1 (0.5 + n) T ns

<44> tHAWT2 n ≥ 1 (1.5 + n) T ns

WAIT setup time (to ASTB↓) <45> tSSTWT1

n ≥ 1, –40°C ≤ TA ≤ +70°C

T – 18 ns

n ≥ 1, 70°C < TA ≤ 85°C

T – 20 ns

<46> tSSTWT2 n ≥ 1

(1 + n) T – 15 ns

WAIT hold time (from ASTB↓) <47> tHSTWT1 n ≥ 1 nT ns

<48> tHSTWT2 n ≥ 1 (1 + n) T ns

Address hold time (from CLKOUT↑)

<49> tDKOD

–40°C ≤ TA ≤ +70°C

20 ns

70°C < TA ≤ 85°C

23 ns

Delay time from DSTB↓ to data output

<50> tDDOD 10 ns

Data output hold time (from CLKOUT↑)

<51> tHKOD 0 ns

Data output setup time (to DSTB↑) <52> tSODD

(1 + n) T – 15 ns

Data output hold time (from DSTB↑)

<53> tHDOD T – 10 ns

Remarks 1. T = tCYK

2. n indicates the number of wait clocks inserted in the bus cycle. The sampling timing differs when

the programmable wait state is inserted.

1 2 ... 24 25 26 27 28 29 30 31 32 33 34 ... 48 49

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