Renesas R8C/17 Technical Information PDF herunterladen (Seite 6)

R8C/16 Group, R8C/17 Group 1. Overview

Rev.2.00 Jan 30, 2006 Page 4 of 35

REJ03B0101-0200

1.3 Block Diagram

Figure 1.1 shows a Block Diagram.

Figure 1.1 Block Diagram

R8C/Tiny Series CPU Core

8

4

1 2

Timer

Timer X (8 bits)

Timer Z (8 bits)

Timer C (16 bits)

A/D Converter

(10 bits

× 4 channels)

System Clock Generator

XIN-XOUT

High-Speed On-Chip

Oscillator

Low-Speed On-Chip

Oscillator

UART or

Clock Synchronous Serial I/O

(8 bits

× 1 channel)

Memory

Watchdog Timer

(15 bits)

ROM

(1)

RAM

(2)

Multiplier

R0H R0L

R1H

R2

R3

R1L

A0

A1

FB

SB

USP

ISP

INTB

PC

FLG

I/O port Port P1

Port P3 Port P4

NOTES:

1. ROM size depends on MCU type.

2. RAM size depends on MCU type.

I

2

C bus Interface

Peripheral Function

1 2 3 4 5 6 7 8 9 10 11 ... 39 40

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