Renesas PROM Programming Adapters PCA7438F-64A Spezifikationen PDF herunterladen (Seite 4)

Rev.2.40 Jun 14, 2004 page 4 of 56

38C1 Group

PIN DESCRIPTION

Table 1 Pin description

FunctionPin

Name

Function except a port function

• Apply voltage of power source to VCC, and 0 V to VSS.

(As for VCC, refer to the recommended operating condition)

• Connect to Vss.

• Reset input pin for active “L”.

• Input and output pins for the main clock generating circuit.

• Connect a ceramic resonator or a quartz-crystal oscillator between the XIN and XOUT pins to set the

oscillation frequency.

• If an external clock is used, connect the clock source to the XIN pin and leave the XOUT pin open.

A feedback resistor is built-in.

• Input 0 ≤ VL1 ≤ VL2 < VL3 voltage.

• LCD common output pins.

• 8-bit input port.

• CMOS compatible input level.

•

1, 2, 4 or 8-bit input and 8-bit pull-down can be programmed.

• LCD segment output pin.

• 8-bit I/O port.

• CMOS compatible input level.

• CMOS 3-state output structure.

• 1-bit input/output and pull-down can be programmed.

• 5-bit I/O port.

• CMOS compatible input level.

• CMOS 3-state output structure.

• 1-bit input/output and pull-up can be programmed.

• Analog input pins for A/D converter.

When these pins are used as ADKEY pins, the input

voltage of ADKEY pin which is input “L” level is A/D

converted automatically.

• 4-bit I/O port.

• CMOS compatible input level.

• CMOS 3-state output structure.

• 1-bit input/output and pull-up can be programmed.

• 8-bit I/O port.

• CMOS compatible input level.

• CMOS 3-state output structure.

• 1-bit input/output and pull-up can be programmed.

• 5-bit I/O port.

• CMOS compatible input level.

• CMOS 3-state output structure.

• 1-bit input/output and pull-up can be programmed.

Power source

CNVSS

Reset input

Clock input

VCC, VSS

CNVSS

RESET

XIN

XOUT

VL1–VL3

COM

–COM

P00/SEG0–

P07/SEG7

SEG

–/SEG

P20/SEG17–

P27/SEG24

(LED)/KW

–

(LED)/KW

/ADKEY

–

AN3/ADKEY3

P44/AN4–

P47/AN7

P50/INT0,

P51/INT1

P52/CNTR0

P53/CNTR1

P54/SIN

P55/SOUT

P56/SCLK

P57/SRDY

P60/XCIN

P61/XCOUT

P62/TOUT

P63/φOUT

P64

Clock output

LCD power source

Common output

Input port P0

Segment output pin

I/O port P2

I/O port P3

Analog input

I/O port P4

I/O port P5

I/O port P6

• LCD segment output pins

• Key input (key-on wake-up) interrupt

input pins

• ADKEY input pins

• Analog input pins for A/D converter

• Interrupt input pins

• Timer X, timer Y function pins

• Serial I/O function pins

• Sub-clock generating circuit I/O pins

(Oscillator is connected.

External clock cannot be input directly.)

Timer 2 output pin

System clock φ output

1 2 3 4 5 6 7 8 9 ... 58 59

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Renesas PROM Programming Adapters PCA7438F-64A Spezifikationen Seite 4

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