Renesas PROM Programming Adapters PCA7438F-64A Spezifikationen PDF herunterladen (Seite 13)

Rev.2.40 Jun 14, 2004 page 13 of 56

38C1 Group

I/O PORTS

Direction Registers (Ports P2–P6)

The I/O ports (P2–P6) have direction registers which determine

the input/output direction of each individual pin.

When “0” is written to the bit corresponding to a pin, that pin be-

comes an input pin. When “1” is written to that bit, that pin be-

comes an output pin.

If data is read from a pin set to output, the value of the port output

latch is read, not the value of the pin itself. Pins set to input are

floating. If a pin set to input is written to, only the port output latch

is written to and the pin remains floating.

Port P0

Port P0 is an input port.

P00/SEG0-P07/SEG7 pins are also used as segment output pins.

These pins can be used as segment output pins by setting seg-

ment output enable bits.

Fig. 11 Structure of PULL register

(

)

–P2

pull-down

–P2

pull-down

Note

–P3

pull-up

–P4

pull-up

–P5

pull-up

–P5

pull-up

–P6

pull-up

Note: These ports are invalid when selecting SEG.

–P0

pull-down

Pull-up/Pull-down Control

By setting the PULL register (address 003316), I/O ports can con-

trol pull-up/pull-down (pins also used as segment output pin: pull-

down, other pins: pull-up). Pull-up/pull-down of pins are performed

by setting the PULL register to “1”.

However, the contents of PULL register does not affect ports pro-

grammed as the output ports.

Input port P0 and I/O port P2 are pulled-down in the initial state.

Also, the pull-down setting is invalid for pins set to segment output

with the segment output enable register (address 003816).

1 2 ... 8 9 10 11 12 13 14 15 16 17 18 ... 58 59

Kommentare zu diesen Handbüchern

Keine Kommentare

Renesas PROM Programming Adapters PCA7438F-64A Spezifikationen Seite 13

Kommentare zu diesen Handbüchern