
REVISION HISTORY
3851 GROUP (built-in 16 KB ROM) DATA SHEET
Rev. Date Description
Page Summary
(1/1)
1.0 05/15/98
First Edition
1.1 07/26/02
Group name is changed.
Figure 1 is partly revised.
Table 1 is partly added.
Figure 3 is partly revised.
Figure 6 is partly revised.
Figure 8 is partly revised.
■Notes is revised.
Figure 10 is partly revised.
“2” of ■Notes on Serial I/O is added.
Figure 19 is partly revised.
Explanations of “[I
2
C Address Register (S0D)]” is partly revised.
Explanations of “•Bit 2: Slave address comparison flag (AAS)” of “[I
2
C Status
Register (S1)]” is partly revised.
Figure name of Figure 28 is revised.
Table 8 is partly revised.
Explanations of “Data Setting” are partly revised.
Figure 32 is partly revised.
Explanations of “Comparator and Control Circuit” is partly eliminated.
Explanations of “RESET CIRCUIT” is partly revised.
Figure 42 is partly revised.
Figure 43 is partly revised.
Explanations of “CLOCK GENERATING CIRCUIT” are partly added.
Explanations of “(1) Middle-speed mode” are partly revised.
Figure 47 is partly revised.
Figure 49 is partly revised.
Explanations of “A-D Converter” of “NOTES ON PROGRAMMING” are partly
revised.
“NOTES ON USAGE” is added.
Explanations of “DATA REQUIRED FOR ROM WRITING ORDERS” are partly
added.
Table 11 is partly revised.
Table 14 is partly revised.
Table 17 is partly revised.
Table 18 is partly revised.
PACKAGE OUTLINE is partly revised.
Pages 52–58 in Rev.1.0 are eliminated.
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