Renesas PCA4738S-42A Spezifikationen PDF herunterladen (Seite 18)

3851 Group

(Built-in 16 KB ROM)

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

MITSUBISHI MICROCOMPUTERS

(2) Asynchronous Serial I/O (UART) Mode

Clock asynchronous serial I/O mode (UART) can be selected by

clearing the serial I/O mode selection bit (b6) of the serial I/O con-

trol register to “0”.

Eight serial data transfer formats can be selected, and the transfer

formats used by a transmitter and receiver must be identical.

The transmit and receive shift registers each have a buffer, but the

two buffers have the same address in memory. Since the shift reg-

ister cannot be written to or read from directly, transmit data is

written to the transmit buffer register, and receive data is read from

the receive buffer register.

The transmit buffer register can also hold the next data to be

transmitted, and the receive buffer register can hold a character

while the next character is being received.

Fig.16 Block diagram of UART serial I/O

1/4

PE FE

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Data bus

Receive buffer register

Address 0018

Receive shift register

Receive buffer full flag (RBF)

Receive interrupt request (RI)

Baud rate generator

Frequency division ratio 1/(n+1)

Address 001C

ST/SP/PA generator

Transmit buffer register

Data bus

Transmit shift register

Address

0018

Transmit shift completion flag (TSC)

Transmit buffer empty flag (TBE)

Transmit interrupt request (TI)

Address

0019

ST detector

SP detector

UART control register

Address 001B

Character length selection bit

Address 001A

BRG count source selection bit

Transmit interrupt source selection bit

Serial I/O synchronous clock selection bit

Clock control circuit

Character length selection bit

7 bits

8 bits

Serial I/O control register

CLK1

Serial I/O status register

1 2 ... 13 14 15 16 17 18 19 20 21 22 23 ... 54 55

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