
25
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
3822 Group
MITSUBISHI MICROCOMPUTERS
TIMERS
The 3822 group has five timers: timer X, timer Y, timer 1, timer 2,
and timer 3. Timer X and timer Y are 16-bit timers, and timer 1,
timer 2, and timer 3 are 8-bit timers.
All timers are down count timers. When the timer reaches “0016”,
an underflow occurs at the next count pulse and the correspond-
ing timer latch is reloaded into the timer and the count is
continued. When a timer underflows, the interrupt request bit cor-
responding to that timer is set to “1”.
Read and write operation on 16-bit timer must be performed for
both high and low-order bytes. When reading a 16-bit timer, read
the high-order byte first. When writing to a 16-bit timer, write the
low-order byte first. The 16-bit timer cannot perform the correct
operation when reading during the write operation, or when writing
during the read operation.
Fig. 21 Timer block diagram
0 act
ve
edge switch bit
mer 1 count source
selection bit
ea
t
me port
control bit “0”
“
1
”
5
5/
1
“
0
”
f(XIN)/16
f
XCIN
516 in low-s
eed mode
✽
1 act
ve
edge switch bit
“
1
0
”
m
e
r
s
t
o
p
c
o
n
t
r
o
l
b
i
t
Falling edge detection
er
o
measurement mode
mer
interrupt
request
Pulse width HL continuously measurement mode
R
i
s
i
n
g
e
d
g
e
d
e
t
e
c
t
i
o
n
“
0
0
”
,
“
0
1
”
,
“
1
1
”
mer
operat
ng
mode bits
mer
interrupt
request
mer
mo
e reg
ster
write signal
5
4/
0
Q
5
4
r
e
c
t
o
n
r
e
g
s
t
e
r
u
s
e
o
u
t
p
u
t
m
o
e
5
4
a
t
c
mer
stop
control bit
“0”
“1”
mer
wr
te
control bit
a
t
c
a
t
c
“1”
“0”
“
1
”
“
1
0
”
Timer X operat-
ing mode bits
“00”,“01”,“11”
I
N
/
1
6
f
X
I
N
/
1
6
i
n
l
o
w
-
s
e
e
d
m
o
d
e
✽
u
se w
t
measurement
mode
0
a
c
t
v
e
e
d
g
e
s
w
i
t
c
h
b
i
t
u
se output mo
e
Q
“
0
”
56
rect
on reg
ster
56
atc
“1”
O
U
T
o
u
t
p
u
t
a
c
t
i
v
e
e
d
g
e
s
w
i
t
c
h
b
i
t
mer 2 wr
te
control bit
“
0
”
“
1
”
O
U
T
o
u
t
p
u
t
c
o
n
t
r
o
l
b
i
t
“
1
”
56/
OUT
CIN
m
e
r
3
c
o
u
n
t
s
o
u
r
c
e
s
e
l
e
c
t
i
o
n
b
i
t
“
0
”
“
1
”
m
e
r
2
i
n
t
e
r
r
u
p
t
r
e
q
u
e
s
t
mer 3
interrupt
request
mer 2 count source
selection bit
mer 1
interrupt
request
a
t
a
u
s
IN
/16
f
XCIN
/16 in low-s
eed mode
]
f
(
XI
N)
/
1
6
(
f
(
X
C
I
N)
/
1
6
i
n
l
o
w
-
s
p
e
e
d
m
o
d
e
✽
)
f
X
I
N
/
1
6
f
X
C
I
N
/
1
6
i
n
l
o
w
-
s
e
e
d
m
o
d
e
✽
0
i
n
t
e
r
r
u
p
t
r
e
q
u
e
s
t
1
interrupt
request
m
e
r
o
p
e
r
a
t
n
g
m
o
e
t
“
0
0
”
,
“
0
1
”
,
“
1
0
“
1
1
”
e
a
t
m
e
p
o
r
t
c
o
n
t
r
o
l
b
i
t
“
1
”
5
2
a
t
c
e
a
t
m
e
p
o
r
t
c
o
n
t
r
o
l
b
i
t
“
1
”
5
3
a
t
c
Timer Y (low) (8) T
i
m
e
r
Y
(
h
i
g
h
)
(
8
)
mer 3
atc
8
mer 3
8
m
e
r
1
a
t
c
8
m
e
r
1
8
m
e
r
2
a
t
c
8
mer 2
8
Timer X (low) (8)
Timer X (high) (8)
T
i
m
e
r
X
(
l
o
w
)
l
a
t
c
h
(
8
) Timer X (high) latch (8)
T
i
m
e
r
Y
(
l
o
w
)
l
a
t
c
h
(
8
) Timer Y (high) latch (8)
OUT output
control bit
“
0
”
“
0
”
“
0
”
5
2
5
3
5
2
r
e
c
t
o
n
r
e
g
s
t
e
r
53
rect
on reg
ster
5
2
a
t
a
o
r
r
e
a
t
m
e
p
o
r
t
5
3
a
t
a
o
r
r
e
a
t
m
e
p
o
r
t
✽
I
n
t
e
r
n
a
l
c
l
o
c
k
φ =
XC
I
N
/
2
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