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10
SuperH
®
Family of Microcontrollers & Microprocessors
■ SuperH has 2D and 3D
graphics capabilities
SuperH RISC and RISC/FPU
microprocessors have excellent
graphics-handling capabilities,
allowing consumer-level prod-
ucts with highly integrated,
enhanced features at popular
prices. Systems built with other
processor architectures require a
separate graphics chip, which
would increase complexity and
add cost.
• Superscalar architecture
(SH-2A, SH-4, and SH-4A) –
Allows FPU operations to occur
independently from non-FPU
operations of the system. This
optimizes the performance
of the graphics calculations
and minimizes flicker and
graphic stalling.
• Pair single-precision data
transfer – Data transfer
can be performed by pair
single-precision data transfer
instructions, which enable two
single-precision (each 32-bit)
data items to be transferred for
double the transfer performance.
• Vector/matrix calculation – Data can be processed
efficiently because four multiplication operations and
one addition operation are performed in parallel.
• Geometric-operation instructions – To enable
high-speed computation with a minimum of
hardware, geometric-operation instructions
perform approximate-value computations.
• The SH-4 supports two 32-byte store queues (SQ) to
perform high-speed burst writes to external memory.
While the contents of one SQ are being transferred to
external memory, the other SQ can be written to
without a penalty cycle. This functionality is especially
useful to transfer video, graphic or display list data to
the frame buffer of the graphic processor.
■ SuperH MCU flash technology leadership
Fourth-generation embedded flash, introduced in 2002,
features single-cycle access to on-chip flash memory.
• 0.18µm process, flash size as high as 1MB
• Access as fast as 12.5ns @ 80MHz
• Up to -40°C to +125°C range
• Minimum endurance up to 10,000 erase/write cycles
Graphic Processor
CPU Interface
Frame Buffer Interface
DIRECT ACCESS
Geometry
Processor
Display
Controller
PRIMITIVES
OF DISPLAY
LIST
Frame Buffer
SDRAM
SQ 1-32 Bytes
SH-4
SQ 2-32 Bytes
Local SH Bus
Display
80MHz
100MHz
Next-Gen
NVMs
50MHz
(180nm)
(150nm)
80MHz
2004 2005 2006 2007 2008 2009 2010 2011 2012 2013
Stack (NOR)
80MHz
(150nm)
Memory
Structure
NOR
NOR
100MHz
(130nm)
(90nm)
133MHz
(65nm)
166MHz
(45nm)
New
NVM
New
NVM
MRAM
MONOS
Metal Oxide
Nitride Oxide
Silicon
100MHz
(0.2- 0.18µm)
M
M
M
M
Fast Data Transfers to Frame Buffers
Using the SH-4 Store Queues
SuperH Flash Roadmap
TOP REASONS TO SELECT SuperH
- Family of 1
- Microcontrollers and 1
- Microprocessors 1
- Renesas Technology America 2
- Introduction 3
- The SuperH Family Roadmap 4
- Family Overview 5
- SuperH Instruction Set 6
- SuperH Programming Model 6
- The SuperH Architecture 7
- CONTROL SIGNAL 8
- A single DIF butterfly 9
- Upward Code Compatibility 10
- SuperH Code Efficiency 10
- SH-2A Enhancements 10
- SH-4A Enhancements 10
- Top Reasons To Select SuperH 11
- SuperH Flash Roadmap 12
- Using the SH-4 Store Queues 12
- Peripherals 14
- Development Tools 19
- Flash Development Toolkit 20
- E10A-USB 22
- Emulator 22
- Bus Event Setup 24
- Real-time profiling 24
- SuperH Tool Selector 24
- SH-2 Series 26
- SH-2 Series Selector Guide 27
- SH-Ether Series 28
- SH-3 and SH-4 Series 30
- Application Examples 33
- Appendices 34
- Architecture Diagrams 35
- Flip open 41
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Dell Wyse 909788-02L manuals
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