Renesas R8C/17 Bedienungsanleitung Seite 3

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Table of Contents
1. Connection with User System................................................................................................ 4
2. Prepare M16C R8C FoUSB/UART debugger........................................................................ 5
3. Memory Map When Using R8C UART Debugger ............................................................... 17
4. Occupied Area for Monitor Program .................................................................................... 18
5. Precautions on Using R8C UART Debugger....................................................................... 18
5.1. When changing the communication speed and restarting the R8C UART debugger
after the R8C UART debugger ends........................................................................................ 18
5.2. ID code of user program .............................................................................................. 18
5.3. Area in which user program can be downloaded......................................................... 18
5.4. Frequency characteristics ............................................................................................ 19
5.5. Limitations on SFR operation....................................................................................... 20
5.6. Limitations on stop mode or wait mode ....................................................................... 20
5.7. Watchdog timer ............................................................................................................ 20
5.8. Real-time operation of user program ........................................................................... 21
5.9. Exceptional step execution .......................................................................................... 22
5.10. Limitations on peripheral functions........................................................................... 23
5.11. Limitations on flag register ....................................................................................... 23
5.12. Operation on peripheral I/O during break................................................................. 23
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