Renesas M16C/6V Technical Information Seite 37

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Seitenansicht 36
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Note 1. Compute bus timing according to BCLK frequency. Use the below formula.
th(RD-AD) = 10
9
[ns] td(DB-WR) = 10
9
x3 - 40 [ns]
f(BCLK)x2 f(BCLK)x2
th(RW-AD) = 10
9
[ns] th(WR-DB) = 10
9
[ns]
f(BCLK)x2 f(BCLK)x2
th(RD-CS) = 10
9
[ns] td(DB-WR) = 10
9
- 25 [ns]
f(BCLK)x2 f(BCLK)x2
th(WR-CS) = 10
9
[ns]
f(BCLK)x2
Note 2. Compute bus timing according to BCLK frequency. Use the below formula.
th(RD-AD) = 10
9
- 10 [ns] td(DB-WR) = 10
9
x3 - 24 [ns]
f(BCLK)x2 f(BCLK)x2
th(RW-AD) = 10
9
- 10 [ns] th(WR-DB) = 10
9
- 35 [ns]
f(BCLK)x2 f(BCLK)x2
th(RD-CS) = 10
9
- 12 [ns] td(DB-WR) = 10
9
- 35 [ns]
f(BCLK)x2 f(BCLK)x2
th(WR-CS) = 10
9
- 12 [ns]
f(BCLK)x2
Seitenansicht 36
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