
QDK™
M16C/Neutrino-NC30
www.state-machine.com/m16c
#include "qep_port.h" /* QEP port */
#include "qvanilla.h" /* "Vanilla" cooperative kernel */
#include "qf.h" /* QF platform-independent public interface */
Listing 3 The qf_port.h header file.
3.2.1 The QF Object Size Configuration
The first part of the
qf_port.h
header file defines limits and sizes of various internal data structures
used in the QF and the applications.
Listing 3(1)
QF_MAX_ACTIVE
defines the maximum number of active objects that QF can manage.
Here this limit is set to just 8, to save some RAM, but you can increase this limit up to 63, in-
clusive.
(2) Maximum event size is set to 2-bytes, meaning that the size of a single event can be up to 64K
bytes.
(3) Maximum event queue counter size is set to 1-byte, meaning that a single event queue can
hold up to 255 events.
(4) Maximum memory pool element size is set to 2-bytes, meaning that a pool can mange blocks
of up to 64K bytes each.
(5) The memory pool counter size is set to 2-bytes, meaning that a pool can manage up to 64K
memory blocks.
(6) The timer counter size is set to 2-bytes, meaning that a maximum timeout can be 2
16
-1 clock
ticks.
3.2.2 The QF Critical Section
The M16C microcontroller supports interrupt prioritization. Therefore it is safe to unlock interrupts
inside ISRs without running the risk of priority inversions for interrupts. You have full control over
interrupt nesting by configuring the priorities to interrupts. In particular, you can entirely prevent
interrupt nesting by assigning the same priority level to all interrupts.
This means that the simple policy of unconditional unlocking of interrupts upon exit from a critical
section can be used because critical section nesting can be easily and safely avoided (see Chapter
7 of [PSiCC2]). This policy means that you must unlock interrupts inside every ISR before invoking
any QF service, such as
QActive_postFIFIO()
,
QF_publish()
, or
QF_tick()
.
The QF critical section policy for M16C is defined in
Listing 3(7-9) as follows:
Listing 3(7) The interrupt lock key is not defined, which means that the interrupt status is not
saved and restored. Just the simple policy of unconditional interrupt locking and unlocking is
used (see Chapter 7 of [PSiCC2]).
(8-9) The macros
QF_INT_LOCK()
/
QF_INT_UNLOCK()
define the CPU and compiler-specific interrupt
locking mechanism. For the M16C, the inline assembly instruction
FCLR I
clears the global inter-
rupt enable flag. Conversely, the assembly instruction
FSET I
sets the global interrupt enable
flag in the M16C flags register.
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