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Renesas PCA7400 Bedienungsanleitung Seite 39

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Seitenansicht 38
MITSUBISHI MICROCOMPUTERS
M37271MF-XXXSP
M37271EF-XXXSP, M37271EFSP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
38
Fig. 37. Sync pulse counter register
Sync pulse counter register
(SYC : address 020F
16
)
Count value
Count source Count time
0: H
SYNC
signal
1: Composite
sync signal
f(X
IN
)/2
13
(1024 µs, f(X
IN
) = 8 MHz)
70
(12) Synchronizing Signal Counter
The synchronizing signal counter counts the composite sync signal
taken out from a video signal in the data slicer circuit or the vertical
synchronizing signal Vsep as a count source.
The count value in a certain time (T time) generated by f(XIN)/2
13
or
f(XIN)/2
13
is stored into the 5-bit latch. Accordingly, the latch value
changes in the cycle of T time. When the count value exceeds “1F16,”
“1F16” is stored into the latch.
The latch value can be obtained by reading out the sync pulse counter
register (address 020F16). A count source is selected by bit 5 of the
sync pulse counter register.
The synchronizing signal counter is used when bit 0 of the PWM
mode register 1 (address 02EA16).
Figure 37 shows the structure of the sync pulse counter and Figure
38 shows the synchronizing signal counter block diagram.
Fig. 38. Synchronizing signal counter block diagram
Reset
5-bit counter
Latch (5 bits)
f(X
IN
)/2
13
Composite
sync signal
H
SYNC
signal
Counter
Sync pulse
counter register
Data bus
Selection gate : connected to black
colored side when
reset.
b5
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