27
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
38C8 Group
Fig. 24 Structure of serial I/O control registers
count source se
ect
on
t
0: f(XIN) (f(XCIN) in low-speed mode)
1: f(X
IN)/4 (f(XCIN)/4 in low-speed mode)
Serial I/O synchronous clock selection bit (SCS)
0: BRG output divided by 4 when clock synchronous serial
I/O is selected.
BRG output divided by 16 when UART is selected.
1: External clock input when clock synchronous serial I/O is
selected.
External clock input divided by 16 when UART is selected.
S
RDY output enable bit (SRDY)
0: P4
7 pin operates as ordinary I/O pin.
1: P4
7 pin operates as SRDY output pin.
Transmit interrupt source selection bit (TIC)
0: Interrupt when transmit buffer has emptied
1: Interrupt when transmit shift operation is completed
Transmit enable bit (TE)
0: Transmit disabled
1: Transmit enabled
Receive enable bit (RE)
0: Receive disabled
1: Receive enabled
Serial I/O mode selection bit (SIOM)
0: Asynchronous serial I/O (UART)
1: Clock synchronous serial I/O
Serial I/O enable bit (SIOE)
0: Serial I/O disabled
(pins P4
4–P47 operate as ordinary I/O pins)
1: Serial I/O enabled
(pins P4
4–P47 operate as serial I/O pins)
er
a
/
contro
reg
ster
(SIOCON : address 001A
16)
b
7b
0
ransm
t
u
er empty
ag
0: Buffer full
1: Buffer empty
Receive buffer full flag (RBF)
0: Buffer empty
1: Buffer full
Transmit shift register shift completion flag (TSC)
0: Transmit shift in progress
1: Transmit shift completed
Overrun error flag (OE)
0: No error
1: Overrun error
Parity error flag (PE)
0: No error
1: Parity error
Framing error flag (FE)
0: No error
1: Framing error
Summing error flag (SE)
0: OE U PE U FE =0
1: OE U PE U FE =1
Not used (returns “1” when read)
e
r
a
/
s
t
a
t
u
s
r
e
g
s
t
e
r
(
S
I
O
S
T
S
:
a
d
d
r
e
s
s
0
0
1
9
1
6)
b
7b
0
contro
reg
ster
(UARTCON : address 001B
16)
aracter
engt
se
ect
on
t
0: 8 bits
1: 7 bits
Parity enable bit (PARE)
0: Parity checking disabled
1: Parity checking enabled
Parity selection bit (PARS)
0: Even parity
1: Odd parity
Stop bit length selection bit (STPS)
0: 1 stop bit
1: 2 stop bits
P4
5/TXD P-channel output disable bit (POFF)
0: CMOS output (in output mode)
1: N-channel open-drain output (in output mode)
Not used (return “1” when read)
b7 b0
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