Renesas PROM Programming Adapter PCA7447FP Technical Information Seite 28

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Seitenansicht 27
25
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
38C8 Group
(2) Asynchronous Serial I/O (UART) Mode
Clock asynchronous serial I/O mode (UART) can be selected by clear-
ing the serial I/O mode selection bit of the serial I/O control register
to 0.
Eight serial data transfer formats can be selected, and the transfer
formats used by a transmitter and receiver must be identical.
The transmit and receive shift registers each have a buffer register,
but the two buffers have the same address in memory. Since the shift
register cannot be written to or read from directly, transmit data is
written to the transmit buffer, and receive data is read from the re-
ceive buffer.
The transmit buffer can also hold the next data to be transmitted, and
the receive buffer register can hold a character while the next char-
acter is being received.
Fig. 22 Block diagram of UART serial I/O
Fig. 23 Operation of UART serial I/O function
f(X
IN
)
1/4
O
E
PE
FE
1
/
1
6
1/16
D
ata
b
us
R
e
c
e
i
v
e
b
u
f
f
e
r
r
e
g
i
s
t
e
r
A
d
d
r
e
s
s
0
0
1
8
1
6
R
e
c
e
i
v
e
s
h
i
f
t
r
e
g
i
s
t
e
r
R
e
c
e
i
v
e
b
u
f
f
e
r
f
u
l
l
f
l
a
g
(
R
B
F
)
R
e
c
e
i
v
e
i
n
t
e
r
r
u
p
t
r
e
q
u
e
s
t
(
R
I
)
B
a
u
d
r
a
t
e
g
e
n
e
r
a
t
o
r
F
requency
di
v
i
s
i
on rat
i
o 1/
(
n+1
)
A
d
d
r
e
s
s
0
0
1
C
1
6
ST/SP/PA generator
T
r
a
n
s
m
i
t
b
u
f
f
e
r
r
e
g
i
s
t
e
r
D
ata
b
us
T
ransm
i
t s
hif
t reg
i
ster
A
d
d
r
e
s
s
0
0
1
8
1
6
T
r
a
n
s
m
i
t
s
h
i
f
t
r
e
g
i
s
t
e
r
s
h
i
f
t
c
o
m
p
l
e
t
i
o
n
f
l
a
g
(
T
S
C
)
T
ransm
i
t
b
u
ff
er empty
fl
ag
(TBE)
T
r
a
n
s
m
i
t
i
n
t
e
r
r
u
p
t
r
e
q
u
e
s
t
(
T
I
)
Add
ress 0019
16
S
T
d
e
t
e
c
t
o
r
SP
d
etector
UART
contro
l
reg
i
ster
Add
ress 001
B
16
Ch
aracter
l
engt
h
se
l
ect
i
on
bi
t
A
d
d
r
e
s
s
0
0
1
A
1
6
BRG
count source se
l
ect
i
on
bi
t
T
r
a
n
s
m
i
t
i
n
t
e
r
r
u
p
t
s
o
u
r
c
e
s
e
l
e
c
t
i
o
n
b
i
t
S
er
i
a
l
I
/
O
c
l
oc
k
se
l
ect
i
on
bi
t
Cl
oc
k
contro
l
c
i
rcu
i
t
C
h
a
r
a
c
t
e
r
l
e
n
g
t
h
s
e
l
e
c
t
i
o
n
b
i
t
7
b
i
t
s
8
b
i
t
s
Serial I/O control register
P
4
6
/
S
C
L
K
S
e
r
i
a
l
I
/
O
s
t
a
t
u
s
r
e
g
i
s
t
e
r
P
4
4
/
R
X
D
P
4
5
/
T
X
D
(f(X
CIN
)
i
n
l
ow-
speed mode)
T
S
C
=
0
T
B
E
=
1
RBF
=0
T
B
E
=
0
T
B
E
=
0
R
B
F
=
1
R
B
F
=
1
ST
D
0
D
1
S
P
D
0
D
1
ST
S
P
T
B
E
=
1
TSC=1
S
T
D
0
D
1
SP
D
0
D
1
S
T
S
P
T
r
a
n
s
m
i
t
b
u
f
f
e
r
w
r
i
t
e
s
i
g
n
a
l
Generated at 2nd bit in 2-stop-bit mode
1
s
t
a
r
t
b
i
t
7
o
r
8
d
a
t
a
b
i
t
s
1
o
r
0
p
a
r
i
t
y
b
i
t
1
o
r
2
s
t
o
p
b
i
t
(
s
)
S
e
r
i
a
l
o
u
t
p
u
t
T
X
D
S
e
r
i
a
l
i
n
p
u
t
R
X
D
R
e
c
e
i
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e
b
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f
e
r
r
e
a
d
s
i
g
n
a
l
T
r
a
n
s
m
i
t
o
r
r
e
c
e
i
v
e
c
l
o
c
k
N
o
t
e
s
1
:
E
r
r
o
r
f
l
a
g
d
e
t
e
c
t
i
o
n
o
c
c
u
r
s
a
t
t
h
e
s
a
m
e
t
i
m
e
t
h
a
t
t
h
e
R
B
F
f
l
a
g
b
e
c
o
m
e
s
1
(
a
t
1
s
t
s
t
o
p
b
i
t
,
d
u
r
i
n
g
r
e
c
e
p
t
i
o
n
)
.
2
: T
h
e
t
r
a
n
s
m
i
t
i
n
t
e
r
r
u
p
t
(
T
I
)
c
a
n
b
e
s
e
l
e
c
t
e
d
t
o
o
c
c
u
r
w
h
e
n
e
i
t
h
e
r
t
h
e
T
B
E
o
r
T
S
C
f
l
a
g
b
e
c
o
m
e
s
1
b
y
t
h
e
s
e
t
t
i
n
g
o
f
t
h
e
t
r
a
n
s
m
i
t
i
n
t
e
r
r
u
p
t
s
o
u
r
c
e
s
e
l
e
c
t
i
o
n
b
i
t
(
T
I
C
)
o
f
t
h
e
s
e
r
i
a
l
I
/
O
c
o
n
t
r
o
l
r
e
g
i
s
t
e
r
.
3
: T
h
e
r
e
c
e
i
v
e
i
n
t
e
r
r
u
p
t
(
R
I
)
i
s
s
e
t
w
h
e
n
t
h
e
R
B
F
f
l
a
g
b
e
c
o
m
e
s
1
.
4
:
A
f
t
e
r
d
a
t
a
i
s
w
r
i
t
t
e
n
t
o
t
h
e
t
r
a
n
s
m
i
t
b
u
f
f
e
r
r
e
g
i
s
t
e
r
w
h
e
n
T
S
C
=
1
,
0
.
5
t
o
1
.
5
c
y
c
l
e
s
o
f
t
h
e
d
a
t
a
s
h
i
f
t
c
y
c
l
e
i
s
n
e
c
e
s
s
a
r
y
u
n
t
i
l
c
h
a
n
g
i
n
g
t
o
T
S
C
=
0
.
Seitenansicht 27
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