Renesas R8C/17 Betriebsanweisung PDF herunterladen (Seite 59)

SmartBook for Renesas R8C/Tiny Microcontrollers

www.MightyMicons.com

As you know well, the interrupts levels of the maskable interrupts meant for the

device’s peripheral functions can be set to the desired level using ILVL2-ILVL0

bits. When two or more interrupts with the same priority level occur at the same

time, the hardware circuit built in the micon resolves the interrupt priority level.

This hardware resolving circuit gives the highest priority to the watch dog timer/

oscillation stop detection and then to the voltage detection functions. After these

special functions, on chip peripherals get the priority and then single step and

address match interrupts get the priority.

Here is the arrangement of interrupts as per priority level:

Compare 0. Highest Priority Level.

INT3.

Timer Z.

Timer X.

INT0.

Timer C.

INT1

Timer Y.

UART1 Reception.

UART0 Reception.

Compare1.

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Renesas R8C/17 Betriebsanweisung Seite 59