
M3062PT2-EPB User’s Manual 4. Hardware Specifications
R20UT0211EJ0300 Aug 16, 2012 Page 81 of 104
Rev.3.00
Figure 4.5 Memory expansion mode and microprocessor mode (2 wait, accessing external area and using multiplex bus)
Read timing
Write timing
BCLK
CSi
ADi
BHE
ALE
RD
ADi
/DBi
td(BCLK-CS)
th(BCLK-CS)
tcyc
td(BCLK-AD)
th(BCLK-AD)
th(RD-CS)
td(BCLK-ALE)
th(BCLK-ALE)
th(RD-AD)
td(BCLK-RD)
th(BCLK-RD)
tac3(RD-DB)
Hi-Z
tsu(DB-RD)
th(RD-DB)
BCLK
CSi
ADi
BHE
ALE
WR,
WRL,WRH
ADi
/DBi
td(BCLK-CS)
th(BCLK-CS)
tcyc
td(BCLK-AD)
td(BCLK-ALE)
th(BCLK-ALE)
th(WR-AD)
td(BCLK-WR)
th(BCLK-WR)
td(BCLK-DB)
td(DB-WR)
th(BCLK-AD)
th(WR-CS)
th(WR-DB)
th(BCLK-DB)
td(AD-ALE) th(ALE-AD)
td(AD-RD)
tdz(RD-AD)
td(AD-ALE) th(ALE-AD)
td(AD-WR)
Kommentare zu diesen Handbüchern