Renesas H8S/2111B Bedienungsanleitung PDF herunterladen (Seite 10)

Peripherals

8

H8

®

Family of Microcontrollers

■ LCD Controller

• Option for using on-chip or

external power supply

• Built-in LCD RAM (up to 128

bits) with byte or word access

• Supports multiple duty cycles:

static, 1/2, 1/3, or 1/4

■ Universal Serial Bus

• Provides v2.0 support

• Offers full-speed, 12Mbps

communication

• Offers high-speed, 480Mbps

communication (H8S/2170)

• Bus-powered mode or

self-powered

• Up to 9 endpoints can be specified

• Four transfer modes supported:

Control, Interrupt, Bulk, and

Isochronous

• On-chip bus transceiver with

option for using external

transceiver

• Total 1280-Byte FIFO buffer

■ Hardware Controller Area

Network (HCAN) Function

• Fully compatible with Bosch

v2.0B specification

• Ideal for automobile and

industrial applications

• Bi-directional 2-wire serial

communication

• Maximum speed up to 1Mbps

• Data length: 0 to 8 bytes

• Number of channels: 1 or 2

• Two data transmission methods:

– Mailbox (buffer)

– Message priority (identifier)

• Supports 12 CPU interrupts

• Supports 6 operating modes

φ

/2 to

φ

/256

φw

SEGn (n = 1 to 40)

LCD port control register

LCD control register

LCD control register 2

Display timing generator

LCD RAM

20 bytes

Internal data bus

40-bit

shift

register

LCD drive

power supply

(On-chip 3-V

constant-voltage

power supply circuit)

Segment

driver

Common

data latch

Common

driver

V1

C1

C2

V2

V3

Vss

COM1

COM4

SEG40

SEG39

SEG38

SEG37

SEG36

SEG1

Vcc

LCD trimming register

BGR control register

Peripheral address bus

Peripheral data bus

MPI

Microprocessor

interface

CPU interface

Control register

Status register

MBI

Message Buffer

Mailboxes

Message control

Message data

MC0-MC15, MD0-MD15

LAFM

HCAN

(CDLC)

CAN

Data Link Controller

Bosch CAN 2.0B

active

Tx buffer

Rx buffer

HTxD

HRxD

HCAN Block Diagram

USB Block Diagram: H8S/2215R

Registers

Interface

Internal

transceiver

[Connection/disconnection]

[Data]

[Internal bus]

[System clock]

[USB operating clock]

[Interrupt request signal]

[Power mode selection]

[Power supply]

Peripheral data bus

Peripheral address bus

Peripheral bus

control signal

(12MHz)

(48MHz)

(48MHz)

(16MHz)

EXTAL48

XTAL48

VBUS

[Suspend]

DrVss

Rs

Rs

DrVcc

UDC core

USD+

USD-

D+

D-

PLL circuit

(x3)

USB clock

generator

1280-Byte FIFO

EP3i

EP3o

EP0o

EP1i

EP2i

EP2o

EP5iEP4i

EP4o

EP0s

EP0i

UDC synchronization

circuit

USPND

UDC:

USB Device Controller

EP0s:

Endpoint 0 setup FIFO

EP0i to 5i:

Endpoint 0 to 5 In FIFO

EP0o to 4o:

Endpoint 0 to 4 Out FIFO

Legend:

IRQ6

EXIRQ0, EXIRQ1

DREQ0, DREQ1

UBPM

USB

φ

[DMA internal request signal]

LCD Block Diagram: H8/38099

1 2 ... 5 6 7 8 9 10 11 12 13 14 15 ... 45 46

Kommentare zu diesen Handbüchern

Keine Kommentare