
SH7145F
Multiprocessor Communications
REJ06B0358-0100O/Rev.1.00 March 2004 Page 10 of 17
Register
Bit
Set Value Function
SMR_0 STOP 0 Stop bit length (enabled in asynchronous mode only)
1-stop-bit transmission and reception when 0
MP 1 Multiprocessor mode (enabled in asynchronous mode only)
Multiprocessor communication enabled when 1
CKS1
CKS2
0
0
Clock select 1, 0
When value is 00, Pφ clock selected using on-chip baud rate generator
as clock source
BRR_0 H'40 Bit rate register 1
8-bit register for adjusting bit rate
SDCR_0 H'F2 Serial direction control register 1
DIR bit (bit 3) selects LSB-first or MSB-first
In task example, DIR = 0 (LSB-first)
SSR_0 H'xx Serial status register 0
Comprises SCI0 status flag and transmit and receive multiprocessor bits
Only 0 may be written to the status flag, to clear it
TDRE * Transmit data register empty (status flag)
RDRF * Receive data register full (status flag)
ORER * Overrun error (status flag)
FER * Framing error (status flag)
PER * Parity error (status flag)
TEND * Transmit end (status flag)
MPB 0 Multiprocessor bit
MPBT 0 Multiprocessor bit transfer
PA1MD1
PA1MD0
0
1
Port A control register L2
Function setting for port A multiplex pin (TXD0)
PACRL2
PA0MD1
PA0MD0
0
1
Port A control register L2
Function setting for port A multiplex pin (RXD0)
*: Can only be cleared to 0. Setting to 1 is performed by hardware.
Kommentare zu diesen Handbüchern