Section 3 Preparing to Connect the Trace Unit
Rev. 2.00 Jan. 28, 2008 Page 31 of 32
REJ10J1422-0200
Notes: 1. The external bus trace interface connector installed on the user system must be as close
to the MPU as possible.
2. Wiring pattern of clock lines (CLKOUT)
The followings are notes on wiring of clock lines for the E200F trace interface signals.
Take them into consideration when designing the user system to embed suitable clock
lines.
(a) Clock lines must be as short as possible.
(b) Clock lines must be surrounded by the GND pattern for protection so that the
signals will be of low-impedance.
(c) Other layers next to the layer with clock line wiring should have solid patterns
of GND/VCC so that the signals will be of low-impedance.
(d) To prevent affect by the crosstalk noise, other signal patterns must not be
embedded along with the clock lines.
3.2.7 Restrictions on Using the Trace Unit
(1) This trace unit supports the external bus memory interfaces of SH7781; SRAM interface and
byte-selection SRAM interface (except for SRAM page mode). For other memory interfaces
(burst ROM, MPX, DDR-SDRAM, PCI, and PCMCIA), bus trace acquisition and bus event
detection are not supported.
(2) When the sequential trace stop condition or delay-count trace stop condition is specified, trace
acquisition will stop after several cycles have been passed from the stop condition match cycle.
(3) During break mode, a timestamp value of the external bus trace information that has been
acquired by a trace is not counted up.
(4) When an emulation memory is used, it is not possible to access the memory on the user system
which is in the same area as an area where the emulation memory has been set.
(5) When an emulation memory is accessed, at least six wait cycles are required. Set the number
of wait cycles by using bits WR3 to WR0 in the CS0 area wait control register (CS0WCR).
(6) When an emulation memory is used, set the same bus width (8 bits, 16 bits, or 32 bits) as that
of the CS0 area on the user system. If the different bus width is set, the emulation memory will
be illegally accessed.
(7) The emulator occupies the CS0 area where the emulation memory has been set. Accordingly, it
is not possible to access the memory in the user system side of that area.
(8) This trace unit is available for the external 8-, 16-, or 32-bit data bus width. When the data bus
width is 8 or 16 bits, unused data bus pins D31 to D8 (for 8-bit bus width) or D31 to D16 (for
16-bit bus width) of the trace unit connector must be fixed to high or low level. In addition,
when area 0 is used with the emulation memory, the bus width of the emulation memory needs
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