
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
3825 Group
36
LCD Display RAM
Address 004016 to 005316 is the designated RAM for the LCD dis-
play. When “1” are written to these addresses, the corresponding
segments of the LCD display panel are turned on.
LCD Drive Timing
The LCDCK timing frequency (LCD drive timing) is generated in-
ternally and the frame frequency can be determined with the fol-
lowing equation;
(frequency of count source for LCDCK)
(divider division ratio for LCD)
f(LCDCK)=
f(LCDCK)
duty ratio
Frame frequency=
Fig. 33 LCD display RAM map
0
0
4
01
6
0
0
4
11
6
0
0
4
21
6
0
0
4
31
6
0
0
4
41
6
0
0
4
51
6
0
0
4
61
6
0
0
4
71
6
0
0
4
81
6
0
0
4
91
6
0
0
4
A1
6
0
0
4
B1
6
0
0
4
C1
6
0
0
4
D1
6
0
0
4
E1
6
0
0
4
F1
6
0
0
5
01
6
0
0
5
11
6
0
0
5
21
6
0
0
5
31
6
ress
1
S
E
G3
S
E
G5
S
E
G7
S
E
G9
S
E
G1
1
S
E
G1
3
S
E
G1
5
S
E
G1
7
S
E
G1
9
S
E
G2
1
S
E
G2
3
S
E
G2
5
S
E
G2
7
S
E
G2
9
S
E
G3
1
S
E
G3
3
S
E
G3
5
S
E
G3
7
S
E
G3
9
76543210
3
0
2
1
0
3
2
1
0
S
E
G2
S
E
G4
S
E
G6
S
E
G8
S
E
G1
0
S
E
G1
2
S
E
G1
4
S
E
G1
6
S
E
G1
8
S
E
G2
0
S
E
G2
2
S
E
G2
4
S
E
G2
6
S
E
G2
8
S
E
G3
0
S
E
G3
2
S
E
G3
4
S
E
G3
6
S
E
G3
8
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