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V850E2/MN4 Timer Array Unit Control

R01AN0922EJ0100 Rev.1.00 Page 32 of 54

Jan 13, 2012

4.4.6 TAUAn Simultaneous Rewrite Registers

• TAUAn channel reload data enable register (TAUAnRDE)

This register enables/disables simultaneous rewrite of data registers TAUAnCDRm and TAUAnTOLm. In this sample

program, the TAUA generates the PWM signal in synchronous channel operation. Simultaneous rewrite is enabled in

channels 0 and 1 in the TAUA1.

Figure 4.27 TAUAnRDE Register Format

Setting example

TAUA1RDE = 0x0003; /* cocurrent rewrite permit */

1 2 ... 27 28 29 30 31 32 33 34 35 36 37 ... 56 57

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