
M16C/30P Group 5. Electrical Characteristics
Rev.1.22 Mar 30, 2007 Page 33 of 53
REJ03B0088-0122
VCC1=VCC2=5V
Timing Requirements
(V
CC1 = VCC2 = 5V, VSS = 0V, at Topr = −20 to 85°C / −40 to 85°C unless otherwise specified)
Table 5.19 Timer B Input (Counter Input in Event Counter Mode)
Symbol Parameter
Standard
Unit
Min. Max.
t
c(TB) TBiIN Input Cycle Time (counted on one edge) 100 ns
t
w(TBH) TBiIN Input HIGH Pulse Width (counted on one edge) 40 ns
t
w(TBL) TBiIN Input LOW Pulse Width (counted on one edge) 40 ns
t
c(TB) TBiIN Input Cycle Time (counted on both edges) 200 ns
t
w(TBH) TBiIN Input HIGH Pulse Width (counted on both edges) 80 ns
t
w(TBL) TBiIN Input LOW Pulse Width (counted on both edges) 80 ns
Table 5.20 Timer B Input (Pulse Period Measurement Mode)
Symbol Parameter
Standard
Unit
Min. Max.
t
c(TB) TBiIN Input Cycle Time 400 ns
t
w(TBH) TBiIN Input HIGH Pulse Width 200 ns
t
w(TBL) TBiIN Input LOW Pulse Width 200 ns
Table 5.21 Timer B Input (Pulse Width Measurement Mode)
Symbol Parameter
Standard
Unit
Min. Max.
t
c(TB) TBiIN Input Cycle Time 400 ns
t
w(TBH) TBiIN Input HIGH Pulse Width 200 ns
t
w(TBL) TBiIN Input LOW Pulse Width 200 ns
Table 5.22 A/D Trigger Input
Symbol Parameter
Standard
Unit
Min. Max.
t
c(AD)
ADTRG Input Cycle Time
1000 ns
t
w(ADL)
ADTRG input LOW Pulse Width
125 ns
Table 5.23 Serial Interface
Symbol Parameter
Standard
Unit
Min. Max.
t
c(CK) CLKi Input Cycle Time 200 ns
t
w(CKH) CLKi Input HIGH Pulse Width 100 ns
t
w(CKL) CLKi Input LOW Pulse Width 100 ns
t
d(C-Q) TXDi Output Delay Time 80 ns
t
h(C-Q) TXDi Hold Time 0 ns
t
su(D-C) RXDi Input Setup Time 70 ns
t
h(C-D) RXDi Input Hold Time 90 ns
Table 5.24 External Interrupt INTi Input
Symbol Parameter
Standard
Unit
Min. Max.
t
w(INH)
INTi Input HIGH Pulse Width
250 ns
t
w(INL)
INTi Input LOW Pulse Width
250 ns
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